2017上科大前沿器件电路与系统高端研讨会 SWEDCS July 7th-8th 2017 

Distinguished Speakers

ShanghaiTech Symposium on Information and Science and Technology

Yiming Huai

VP of Avalanche Technology
 Speech detail.

Kei May LAU

Fang Professor of Engineering and Chair Professor Dept of Electronic & Computer Engineering, HKUST

Senior Fellow Institute of Advanced Study, HKUST

Fellow of IEEE
Fellow of CSR


 Speech detail.

Alberto L. Sangiovanni-Vincentelli

Professor, The Edgar L. and Harold H. Buttner Chair of EECS, University of California at Berkeley

Member of the US National Academy of Engineering

Fellow of ACM
Fellow of IEEE

 Speech detail.

Alwyn Seeds

Head of Department and Professor of Opto-Electronics, University College London

Fellow of the Royal Academy of Engineering

Fellow of IEEE


 Speech detail.

Steve Trimberger

‎Fellow at Xilinx Inc.

Member of the US National Academy of Engineering

Fellow of ACM
Fellow of IEEE


 Speech detail.

Kang Wang

Distinguished Professor and Raytheon Chair in Electrical Engineering, University of California at Los Angeles

Fellow of IEEE


 Speech detail.

Invited Speakers

ShanghaiTech Symposium on Information and Science and Technology

Deming Chen

Professor, Donald Biggar Willett Faculty Scholar

NSF CAREER Award (2008)

ACM SIGDA Outstanding New Faculty Award (2010)
IBM Faculty Award (2014/2015)


 Speech detail.

Yiran Chen

Associate Professor of Duke University

NSF CAREER Award (2013)

ACM SIGDA Outstanding New Faculty Award (2014)


 Speech detail.

Kiyoung Choi

Professor of Seoul National University

Fellow of the IEEE


 Speech detail.

Shu-hung (Henry) Chung

Assistant Department Head and Professor of City University, Hongkong

Fellow of the IEEE


 Speech detail.

Songbin Gong

Assistant Professor of University of Illinois at Urbana Champaign

DARPA Young Faculty Award (2014)


 Speech detail.

Frédéric Grillot

Professor of Télécom ParisTech


 Speech detail.

Yinhe Han

Professor of Institute of Computing, Chinese Academy of Sciences

Chair of Young Computer Scientists & Engineers Forum(YOCSEF), China Computer Federation(CCF),2016-2017


 Speech detail.

Yong-Zhen Huang

Professor of Institute of Semiconductors, Chinese Academy of Sciences


 Speech detail.

Adrian Ioinovici

Professor Holon Institute of Technology, Isreal

Fellow of the IEEE


 Speech detail.

Fadi J. Kurdahi

Professor of University of California at Irvine

Fellow of the IEEE


 Speech detail.

Jih-Sheng (Jason) Lai

Professor of Virginia Tech

Fellow of the IEEE


 Speech detail.

Fan-Yi Lin

Professor of National Tsinghua University


 Speech detail.

Chengbin Ma

Associate Professor of University of Michigan - Shanghai Jiao Tong University Joint Institute


 Speech detail.

Hiroo Sekiya

Professor of Chiba University

Former Chair of The Power and Energy Circuits and Systems Technical Committee and Nonlear Circuits and Systems Techninal Commuttee, IEEE CAS Society


 Speech detail.

Yu Wang

Associate Professor of Tsinghua University


 Speech detail.

Shimeng Yu

Assistant Professor of Arizona State University

NSF Faculty Early CAREER Award (2016)


 Speech detail.

ShanghaiTech Symposium on Information and Science and Technology

Speakers and Speeches Information

Deming Chen

Professor
Donald Biggar Willett Faculty Scholar

Title: Cognitive Computing on Heterogeneous Hardware Systems for the AI Revolution

Abstract: Many envision that AI (artificial intelligence) will usher in the next iteration of technology revolution, where humans and machines will work side-by-side to augment, enhance, or accelerate our ability to analyze, learn, create, and think. There are successful stories emerging fast already, such as IBM Watson, Microsoft HoloLens, and Google AlphaGo. One essential component to enable the new AI revolution is IoT (Internet of Things). Cognitive computing can learn from the rich IoT data, reason from models, and most importantly interact with us to perform complex tasks (ranging from healthcare to education to financial services) better than either humans or machines can do by themselves. Meanwhile, high-performance computing would be of paramount importance to help achieve the grand vision of cognitive computing. In this talk, Prof. Chen will share his recent research results on machine learning, reconfigurable computing, and cognitive application benchmarking. He will also present his recent work on extremely fast software and hardware modeling and the automated software/hardware co-design for accelerating cognitive computing workloads.

Bio: Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He joined the ECE department of University of Illinois at Urbana-Champaign (UIUC) in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department. His current research interests include system-level and high-level synthesis, computational genomics, GPU and reconfigurable computing, and hardware security. He has given more than 80 invited talks sharing these research results worldwide. Dr. Chen is a technical committee member for a series of top conferences and symposia on EDA, FPGA, low-power design, and VLSI systems design. He also served as Program or General Chair, TPC Track Chair, Session Chair, Panelist, Panel Organizer, or Moderator for many of these conferences. He is an associated editor for several IEEE and ACM journals. He received the NSF CAREER Award in 2008, and six Best Paper Awards for ASPDAC'09, SASP'09, FCCM'11, SAAHPC'11, CODES+ISSS'13, and ICCAD'15. He received the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014 and 2015. He is the Donald Biggar Willett Faculty Scholar. He is included in the List of Teachers Ranked as Excellent in 2008. He was involved in two startup companies previously, which were both acquired. In 2016, he co-founded a new startup, Inspirit IoT, Inc., for design and synthesis for machine learning targeting the IoT industry. Inspirit IoT recently received an NSF SBIR (Small Business Innovation Research) Award from the US government.

More
Yiran Chen

Associate
Professor of Duke University

Title: A Brief Introduction of Neuromorphic Computing and Deep Learning Acceleration

Abstract: Fast growth of cognitive applications generates significant demand for non Von Neumann architecture, which breaks the boundary between computation units and memory. As an important non Von Neumann architecture, neuromorphic computing, which stands for VLSI implementation for biologically inspired computing platform, recently received great attentions from both academia and industry. Such an emerging architecture is able to efficiently perform computation of major types of neural networks, and has been extended to deep learning domain in the form of computing accelerators. In this talk, we first give a preliminary about different mainstream neural networks and deep learning algorithms, and then discuss how to design a hardware to accelerate those networks and algorithms. Some model optimization methods for computation efficiency enhancement will be also discussed.

Bio: Dr. Yiran Chen received B.S and M.S. (both with honor) from Tsinghua University and Ph.D. from Purdue University in 2005. After five years in industry, he joined University of Pittsburgh in 2010 as Assistant Professor and then promoted to Associate Professor in 2014, held Bicentennial Alumni Faculty Fellow. He now is Associate Professor of the Department of Electrical and Computer Engineering at Duke University and serving as the co-director of Duke Center for Evolutionary Intelligence, focusing on the research of new memory and storage systems, machine learning and neuromorphic computing, and mobile computing systems. Dr. Chen has published one book, a dozen of book chapters, and more than 300 technical papers. He has been granted 91 US and international patents with other 11 pending applications. He is the associate editor of IEEE TCAD, IEEE D&T, IEEE ESL, ACM JETC, ACM TCPS, and served on the technical and organization committees of more than 40 international conferences. He received 5 best paper awards from ISQED, ISLPED, GLSVLSI, ESWEEK, DATE, and the other a dozen of nominations from premier international conferences. He is the recipient of NSF CAREER award and ACM SIGDA outstanding new faculty award.

More
Kiyoung Choi

Professor
Seoul National University

Title: Various Approaches to Near-Data Processing

Abstract: Near-data processing is to process data near the memory where the data reside. The main goal is to save time and energy for data movement. The basic concept is not new; there were many attempts to realize it in 1990s, but they were unsuccessful at that time. Recently, the concept is reviving as a promising solution to the memory wall crisis in the big data era. This talk presents various ways of exploiting the concept of near-data processing. In particular, it presents what kind of specific approaches can be used depending on where in the memory hierarchy the data can be processed most efficiently. Applications may include high performance computing, big data/graph processing, and deep neural networks.

Bio: Kiyoung Choi received B.S., M.S., and Ph.D. degrees, all in EE, from Seoul National University, KAIST, and Stanford University, respectively. He worked for LG from 1978 to 1983 and for Cadence Design Systems from 1989 to 1991. In 1991, he moved to the Department of Electrical and Computer Engineering at Seoul National University, where he is now a professor. His primary research interests are in EDA, computer architecture, and machine learning. He is a Fellow of IEEE.

More
Shu-hung (Henry) Chung

Assistant Department Head and Professor
City University, Hongkong

Title: Smart Power Electronics for the Smart Grid

Abstract: In this talk, he will share his research works on using man-learning algorithms in smart power electronics systems and the outlook. He will demonstrate the concept on a battery tester, which has been tested on mobile post office and ambulance for the Electrical and Mechanical Services Department of the Hong Kong Government.

Bio: Professor Henry Shu-hung Chung received the B.Eng. degree and the Ph.D degree in electrical engineering both from The Hong Kong Polytechnic University, Hong Kong, in 1991 and 1994 respectively. Since 1995 he has been with the City University of Hong Kong. He is currently professor of the Department of Electronic Engineering and Director of the Centre for Smart Energy Conversion and Utilization Research, City University of Hong Kong. He is Fellow of Institute of Electrical and Electronics Engineers (IEEE). His research interests include renewable energy conversion technologies, lighting technologies, and smart grid technologies. He is currently Editor-in chief of the IEEE Power Electronics Letters, and Associate Editor of the IEEE Transactions on Power Electronics and the IEEE Journal of Emerging and Selected Topics in Power Electronics. He has received numerous industrial awards for his invented energy saving technologies.

More
Yinhe Han

Professor
Institute of Computing, Chinese Academy of Sciences

Title: Robot Intelligent Processor

Abstract: Robot should have strong capacities of perception, cognition and motion in the future. All of these capacities are based on the high performance computing engine. But, there is not a specific computing system for robot today. Motivated by this, we are trying to develop the intelligent chip, computer architecture for robot and future control system. The target of this project is to provide the key chip and full-stack computing system including operate system, complier and develop environment for robot. In this talk, we will analyze the characteristic of robot applications first. Then, I will introduce some obtained achievements: embedded and low power.

Bio: Yinhe Han, Professor of Institute of Computing Technology, Chinese Academy of Sciences. His interests include chip design and test, computer architecture. In these fields, he has published more than 70 high quality papers, including some top conferences papers such as ISCA, HPCA, DAC. He has received several important awards such as the Second class prize of National Technology Invention Awards (2012), National Outstanding Dissertation Award Candidates (2008), Outstanding Dissertation Award of China Computer Federation(CCF). He was the Chair of CCF Young Computer Scientists & Engineers Forum (CCF YOCSEF)(2016-2017), and the secretary of technical committee on fault tolerant computing. His work is supported by the National Natural Science Fund for Outstanding Young Scholars (2015).

More
Yiming Huai

VP
Avalanche Technology

Title: STT-MRAM: ON THE CUSP OF MASS PRODUCTION

Abstract: Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) is a leading emerging nonvolatile memory for embedded memory applications and for persistent memory in new market applications owing to its unique performance combination of fast read and write speed (<50ns), high endurance (1016), and non-volatility. While STT-MRAM technology is on the cusp of mass production, critical technical and manufacturing challenges remain. In addition to the continued advance in perpendicular magnetic tunnel junction (pMTJ) performance, advanced process development is increasingly pivotal for manufacturing yield improvement.
This keynote talk will review current status of STT-MRAM product devolvement and manufacturing, and highlight key items in critical path for successful STT-MRAM mass production. Write error rate, read disturb, read/write endurance, and data retention of Avalanche’s fully functional 64Mbit chip will be presented. We also discuss the market entry of the STT-MRAM. While it is currently being targeted for stand-alone memory (replacing nvSRAM and DRAM) and embedded memory (replacing embedded Flash, SRAM and DRAM), new market applications such as storage-class solid state drives and unified NVM solutions are also being explored.
We will also present a 3D cross-point STT MRAM architecture utilizing a novel two-terminal bipolar threshold selector. We have demonstrated the integrated device performance of the selector and the state-of-the-art perpendicular MTJ. This effectual combination of selector and pMTJ provides a path to implement 3D STT-MRAM array for high density non-volatile storage memory. Finally, we will compare STT MRAM with other NVM technologies such as RRAM in term of production readiness and different market applications.

Bio: Dr. Yiming Huai serves as VP of Technology and Foundry Partnership at Avalanche Technology, a front runner to commercialize STT MRAM technology. He leads Avalanche STT MRAM product development and manufacturing in collaboration with top-tier foundries and also plays a key role in business development.
Dr. Huai is a pioneer on STT MRAM and was the first to demonstrate spin transfer switching in magnetic tunnel junctions. Dr. Huai received his BS degree in theoretical physics from Shanghai University of Science and Technology and his M.S. and Ph.D. in Physics from the University of Montreal . He worked as a Staff Scientist at the Lawrence Livermore National Laboratory and as a Post-Doctoral Fellow at the National Research Council in Ottawa, Canada. From 1996 to 2001, Dr. Huai served as Sr. Director of Thin Film Manufacturing at Read-Rite Corporation (now Western Digital), where he led the development and volume production of industry leading GMR heads for hard disk drives. In 2002, Dr. Huai cofounded Grandis, Inc., a pioneer in STT MRAM technology and served as CTO, VP of Engineering and board member. While at Grandis, Dr. Huai successfully raised more than $25M in private and government (DARPA and NIST) funding and led STT MRAM joint development with leading semiconductor companies (Renesas and Hynix). Grandis was acquired by Samsung in 2011. He has published more than 140 papers in scientific journals, and holds more than 150 U.S. patents. He has given more than 60 invited talks on STT-MRAM technology and has served as Conference Chairman and Organizer for major international magnetic and semiconductor conferences and workshops. Dr. Huai was an Editorial Board member of Spin Journal in 2012 and a Board of Director of Chinese American Information Storage Society from 2005-2006. In 1996, Dr. Huai received the prestigious R&D 100 Award for his innovative work on Ultra-High Density Magnetic Sensors.

More
Yong-Zhen Huang

Professor
Institute of Semiconductors, Chinese Academy of Sciences

Title: Dynamical characteristics of whispering-gallery mode microlasers subject to optical injection

Abstract: Whispering-gallery mode (WGM) microlasers have attracted a great attention as a potential light source for photonic integration circuits. In this talk, the nonlinear dynamical states including four-wave mixing, period-one and period-two oscillations, and injection locking state are demonstrated from the lasing spectra for the microlasers under optical injection, by varying the detuning frequencies between the free-running lasing mode and the injected light. The enhancement of small signal modulation bandwidth is realized for the optical injection locking state. Furthermore, dynamical characteristics are investigated for integrated twin-microlaser under mutually optical injection.

Bio: Yong-Zhen Huang received the B.Sc., M.Sc., and Ph.D. degrees in physics from Peking University, Beijing, China, in 1983, 1986, and 1989, respectively. Then He joined the Institute of Semiconductors (the Institute), Chinese Academy of Sciences. He was a visiting Scholar at BT Laboratories, Ipswich, U.K., in 1994. He has been a Professor with the Institute since 1997. He is the Director of the State Key Lab on Integrated Optoelectronics, and Head of Optoelectronics R&D Center and vice-Director of Academic Committee of the Institute. He received the National Natural Science Foundation for Distinguished Young Scholars in 2002. His research interests are mainly focused on unidirectional emission semiconductor microcavity lasers for application in photonic integrated circuits, III-V lasers on silicon for optical interconnection, nonlinear dynamics for integrated microcavity lasers and optical frequency comb generation using dual-mode lasing microcavity laser as a seeding light source. He has established the first analytical mode solutions for dielectric equilateral triangle, square and rectangular optical microcavities, and proposed to realize unidirectional emission microcavity lasers by directly connecting an output waveguide, which can be fabricated by contacting photolithography technique, instead of evanescent coupled waveguide. His group has designed and fabricated a series novel directional emission microcavity lasers and integrated devices. He published over 100 SCI papers about microcavity lasers. His works on microcavity lasers were selected as important achievements of optics in China by the magazine of Laser and Optoelectronics in 2008, 2009 and 2010. One of his Ph. D students got the prize of national 100 excellent doctoral dissertations and three got the prize of excellent doctoral dissertations of Chinese Academy of Sciences.

More
Songbin Gong

Assistant Professor
University of Illinois at Urbana Champaign

Title: Piezoelectric MEMS Devices and Subsystems for Radio Frequency Signal Processing

Abstract: 

Bio: Dr. Songbin Gong joined the Department of Electrical and Computer Engineering at University of Illinois Urbana Champaign as an assistant professor in August 2013. Prior to UIUC, he was a research scientist with the Department of Electrical and Computer Engineering at Carnegie Mellon University, Pittsburgh from 2012 to 2013, and a postdoctoral researcher with the Department of Electrical and Systems Engineering at the University of Pennsylvania, Philadelphia from 2010 to 2012.
He received his PhD degree in Electrical Engineering from the University of Virginia, Charlottesville, in 2010, and his Bachelor degree from Huazhong University of Science and Technology, Wuhan, in 2004. He has over ten years of research experience in RF microsystems and 30 peer-reviewed publications on the subject.
His research interests primarily include design and implementation of RF-MEMS devices, components, and subsystems for reconfigurable RF front ends, and engineering hybrid microsystems based on the integration of MEMS devices with photonics or circuits for imaging, sensing,and signal processing.
Dr. Gong is an recipient of the 2014 DARPA Young Faculty Award. He has been a guest editor for the special issue of "RF-MEMS" in the Journal of Micromechanics and Microengineering,and also a technical committee member of MTT-21 RF-MEMS in IEEE Microwave Theory and Techniques Society.

More
Frédéric Grillot

Professor
Télécom ParisTech

Title: Nonlinear Integrated Silicon Photonics

Abstract: Silicon photonics offer a tight integration of a variety of active and passive optical and electrical components, and gained so much interest in the last decade that it is now considered one of the most promising technology for photonics applications [1]. Building on the mature fabrication techniques first developed for microelectronics allows creating photonic integrated circuits (PICs) with a high density of optical components, in high volumes and at low costs.
However, integrated components of a PIC can experiment unintentional reflections from various possible interfaces such as active and passive transitions, waveguide crossings, regrowth interfaces, or process imperfections. Unwanted reflections may travel back into the laser cavity resulting in a variety of nonlinear dynamics arising under five distinct regimes, depending on feedback strength and cavity length [2]. In most cases, the feedback levels corresponding to such reflections can cause deleterious effects such as linewidth broadening, mode hopping, and/or increased amplitude noise, which is detrimental to most data communication systems. Lasers integrated with a silicon photonic chip are particularly susceptible to these deleterious effects, as the low loss waveguides and high index contrast inherent to the platform are particularly conducive to the creation of strong unintentional feedback [3].
This talk aims at analyzing the non-linear dynamics of hybrid III-V/Si semiconductor lasers (both Fabry-Perot and DFB) when subject to various optical feedbacks conditions. Results will show the impact of such parasitic reflections on the communication system as well as on the laser dynamics [4]. In the latter, a bandwidth chaos enhancement will be unveiled in a hybrid III-V/Si DFB laser operating under dual optical feedback, which is of outmost importance for the design of chaotic hybrid emitters integrated on a PIC [5].
References
[1] Thomson, D. et al., Roadmap of Silicon Photonics, IOP Journal of Optics, 18, pp. 073003, (2016)
[2] Dal Bosco, et al. A. K., Cycles of self-pulsations in a photonic integrated circuit, Physical Review E, 92, pp. 062905, (2015)
[3] Liu, A. et al., Reflection sensitivity of 1.3 μm quantum dot lasers epitaxially grown on silicon, in press, Optics Express, (2017)
[4] Schires, K. et al., Dynamics of Hybrid III-V Silicon Semiconductor Lasers for Integrated Photonics, IEEE J. of Selected Topics in Quant. Electron. 22, 1800107 (2016)
[5] Gomez, S. et al., Wideband Chaos in Hybrid III-V/silicon Distributed Feedback Semiconductor Lasers under Optical Feedback, SPIE Photonics West, (2017)

Bio: Frédéric Grillot was born in Versailles, France, on August 22, 1974. He received the M.Sc. degree from the University of Dijon, France, 1999, and the Ph.D. degree from the University of Besançon, France, in 2003. His doctoral research activities were conducted within the optical component research department in Alcatel-Lucent working on the effects of the optical feedback dynamics in semiconductor lasers, and the impact this phenomenon has on communication systems. From 2003 to 2004, he was with the Institut d’Electronique Fondamentale (University Paris-Sud) where he focused on integrated optics modeling and on Si-based passive devices for optical interconnects. From September 2004 to September 2012, he was working with the Institut National des Sciences Appliquées as an Assistant Professor. From 2008 to 2009, he was also a Visiting Professor at the University of New-Mexico, Albuquerque, USA, leading research in optoelectronics at the Center for High Technology Materials. Since October 2012, he has been working with Telecom Paristech (alias Ecole Nationale Supérieure des Télécommunications), Paris, France where he became Associate Professor then Full Professor in January 2017. Since August 2015, he has also been serving as a Research Professor at the University of New-Mexico. In April 2017, he joined the Electrical Engineering department at the University of California at Los Angeles as a visiting Professor teaching dynamics of lasers and doing research in mesoscopic optics and quantum electronics. Dr. Grillot is the author or coauthor of 77 journal papers, one book, three book chapters, and more than 170 contributions in international conferences and workshops. His current research interests include advanced quantum confined devices using new materials such as quantum dots and dashes, light emitters based on intersubband transitions, nonlinear dynamics and optical chaos in semiconductor lasers systems as well as microwave and silicon photonics applications including photonic clocks and photonic analog to digital converters. He is an Associate Editor for Optics Express, Senior Member of the SPIE and of the IEEE Photonics Society, as well as a Member of the OSA

More
Adrian Ioinovici

Professor
Holon Institute of Technology, Isreal

Title: Power Electronics Converters in Grids Supplied by Renewable Sources of Energy

Abstract: Although there is a rich history of cross-layer design for embedded computing systems to achieve desired QoS, we are facing ever more challenges from the intertwined goals of energy- efficiency, thermal design constraints, as well as resilience to errors emanating from the application, environment and hardware platforms. We posit that next-generation computing platforms must necessarily deploy intelligent cross-layer design achieved through self-awareness principles inspired by biology and nature. Such an approach will move us from current strategies (using limited cross-layer coordination) to a holistic cross-layer strategy that enables intelligent cross-layer management policies which can adaptively tune itself based on the current state of the system. The talk will present design exemplars that embrace this intelligent cross-layer approach, and highlight the role of self-awareness in achieving dynamic adaptivity.

Bio: To be useful as energy suppliers of the local or national grids, the renewable sources have to be followed by power electronics regulators answering tough requirements : large dc gain, non-pulsating input current, high energy-processing efficiency, good power density, reliability. The switched-capacitor converters with their typical very large conversion gain will be re-visited in order to clarify misunderstandings still present today. The challenges of perfect interleaving of switched-capacitor stages able to absorb a non- pulsating current even during transients will be discussed. Then, new passive switched-capacitor-inductor cells , inserted in active power stages will open the way for the description of the modern converters associated to the green sources of energy. The talk will focus on a systematic development of the switched cells starting from a simple graph. It will be shown that almost all the non-isolated solutions available today can be derived from the same graph. Such an approach will allow a comparison of the solutions in terms of dc gain, voltage and current stresses, devices count, efficiency. And, more important, it will create the first premises for derivation of optimized converters able to answer different practical objectives in smart grids supplied by renewable energy.

More
Fadi J. Kurdahi

Professor
University of California at Irvine

Title: Towards Self-Aware Computing Systems through Intelligent Cross-Layer Coordination

Abstract: Although there is a rich history of cross-layer design for embedded computing systems to achieve desired QoS, we are facing ever more challenges from the intertwined goals of energy- efficiency, thermal design constraints, as well as resilience to errors emanating from the application, environment and hardware platforms. We posit that next-generation computing platforms must necessarily deploy intelligent cross-layer design achieved through self-awareness principles inspired by biology and nature. Such an approach will move us from current strategies (using limited cross-layer coordination) to a holistic cross-layer strategy that enables intelligent cross-layer management policies which can adaptively tune itself based on the current state of the system. The talk will present design exemplars that embrace this intelligent cross-layer approach, and highlight the role of self-awareness in achieving dynamic adaptivity.

Bio: Fadi Kurdahi received his PhD from the University of Southern California in 1987. Since then, he has been a faculty at the Department of Electrical & Computer Engineering at UCI, where he conducts research in the areas of Computer Aided Design and design methodology of large scale systems. He serves as the Associate Dean for Graduate and Professional Studies of the Henry Samueli School of Engineering, and the Director of the Center for Embedded & Cyber-physical Systems (CECS), comprised of world-class researchers in the general area of Embedded and Cyber-physical Systems. He served on numerous editorial boards, and was program chair or general chair on program committees of several workshops, symposia and conferences in the area of CAD, VLSI, and system design. He received the best paper awards for the IEEE Transactions on VLSI in 2002, ISQED in 2006 and ASP-DAC in 2016, and other distinguished paper awards at DAC, EuroDAC, ASP- DAC and ISQED. He also received the Distinguished Alumnus award from his Alma Mater, the American University of Beirut in 2008. He is a Fellow of the IEEE and the AAAS.

More
Jih-Sheng (Jason) Lai

Professor
Virginia Tech University

Title: Solar PV Power Electronics for Renewable Energy and Smart/Micro Grids

Abstract: Power electronics is the core technology that enables solar photovoltaic (PV) energy to be efficiently and effectively converted to the desired format for utility and smart/micro grids. This presentation will start briefly to introduce the basic architecture of PV systems and how to integrate them into utility and smart/micro grid with advanced power electronics technologies. A solar house installation at Virginia Tech Future Energy Electronics Center will be given as an example to show energy harvest results with different power electronics technologies. A special emphasis is to introduce the concept of power optimizer, which can effectively increase the photovoltaic output power production for frequently shaded installation. Typical configuration of PV power optimizers is to connect low-voltage dc-dc in series, which will drop out the power production during shaded condition if the series number of PV panels does not have sufficient redundancy. Under short circuit or partial short circuit fault condition, the series configuration is not isolated from the fault, and the converter can be easily damaged. Isolated paralleled configuration is preferred, but the technology requires high-voltage power semiconductor devices, and the design is relatively challenging. This presentation will introduce a recently developed paralleled type PV power optimizer with galvanic isolation and built-in intelligence to enhance reliability of the dc distribution system. The dc distribution system can maintain a constant 380 V by the downstream dc-ac inverter to form a hybrid dc and ac micro grid. The system architecture, different converter design options, and hardware experimental results will be presented.

Bio: Jih-Sheng (Jason) Lai received M.S. and Ph.D. degrees in electrical engineering from the University of Tennessee, Knoxville, in 1985 and 1989, respectively. In 1989, he joined the Electric Power Research Institute (EPRI), where he managed EPRI-sponsored power electronics research projects. From 1993, he worked with the Oak Ridge National Laboratory as the Power Electronics Lead Scientist, where he initiated a high power electronics program and developed several novel high power converters including multilevel converters and auxiliary resonant snubber based soft-switching inverters. He joined Virginia Tech in 1996. Currently he is James. S. Tucker Endowed Chair Professor and the Director of Future Energy Electronics Center (FEEC). He has published more than 400 refereed technical papers and 2 books. He holds 25 U.S. patents in the area of high power electronics and their applications. He received Technical Achievement Award in Lockheed Martin Award Night and 11 Best Paper Awards from IEEE conferences and journals. His student teams won the First Prize Award in Texas Instruments Analog Design Competition in 2011, the Grand Prize Award from International Future Energy Challenge in 2013, and the Top Three Award from the Google Little Box Challenge in 2016. Dr. Lai is an IEEE Fellow and the recipient of 2016 IEEE Industry Applications Society Gerald Kliman Innovation Award. He is the Founding Chairs of Asian Conference on Energy, Power and Transportation Electrification (ACEPT-2016) and IEEE Future Energy Challenge (IFEC-2001), General Chairs of IEEE Workshop on Computers in Power Electronics (COMPEL 2000) and IEEE Applied Power Electronics Conference (APEC 2005). Currently he serves as the Publications Chair for IEEE Transportation Electrification Community, Editor for IEEE Journal of Emerging and Selected Topics in Power Electronics, and Academic Editor for Energies – an MDPI Journal.

More
Kei May LAU

Fang Professor, Chair Professor
HKUST

Title: InAs quantum dot Micro-lasers grown on exact (001) Si emitting at communication wavelengths

Abstract: To support an energy-efficient optical interconnect technology enabled by silicon photonics, development of low-power-consumption active devices and associated integration technologies is needed. Most communication wavelength lasers with excellent device performance have been grown on III-V substrates and bonded to silicon. For monolithic integration, there are considerable advantages in a technology that allow growth and fabrication of such lasers on III-V/ Si compliant substrates. Quantum dot (QD) active layers grown on lattice-matched III-V substrates have demonstrated their benefits for lasers with low-thresholds and temperature-independent operation. In addition, the reduced sensitivity of QD to defects and their unique capability of filtering dislocations make them an ideal candidate as the gain medium of hetero-integrated III-V on Si optical sources. In this talk, I will discuss the growth of multi-stack QDs on compliant substrates by MOCVD. Fabrication and laser characteristics of whispering-gallery-mode (WGM) micro-lasers using the grown epitaxial structures will also be discussed. Initial demonstration was achieved using simple a colloidal lithography process in combination with dry and wet-etching. The micro-disk lasers were one to four microns in diameter, with single mode lasing at either 1.3 or 1.55 µm, depending on the barrier/cladding system. With smooth sidewalls and sufficient undercut by wet etching of the pedestal, the air-cladded MDs exhibit ultra-low thresholds of a few uW by optical pumping. Preliminary results of electrically-pumped micro-lasers will also be presented. These energy-efficient micro-lasers are excellent candidates for on-chip integration with silicon photonics.

Bio: Professor Kei May Lau is Fang Professor of Engineering at the Hong Kong University of Science and Technology (HKUST). She received the B.S. and M.S. degrees in physics from the University of Minnesota, Minneapolis, and the Ph.D. degree in Electrical Engineering from Rice University, Houston, Texas. She was on the ECE faculty at the University of Massachusetts/Amherst and initiated MOCVD, compound semiconductor materials and devices programs. Since the fall of 2000, she has been with the ECE Department at HKUST. She established the Photonics Technology Center for R&D effort in III-V materials, optoelectronic, high power, and high-speed devices. Professor Lau is a Fellow of the IEEE, and a recipient of the US National Science Foundation (NSF) Faculty Awards for Women (FAW) Scientists and Engineers (1991) and Croucher Senior Research Fellowship (2008). She is an Editor of the IEEE EDL and Associate Editor of Applied Physics Letters.

More
Fan-Yi Lin

Professor
National Tsinghua University

Title: Intelligent 3D Chaos Lidar System

Abstract: I will present the development of an “Intelligent 3D Chaos Lidar System” for applications of intelligent machinery including autonomous car, drone, robot, and surveillance. The system consists of chaos laser, laser scanning, transmitting and receiving optics, image processing, and signal processing and analysis modules. By developing core technologies including chaos laser, hybrid MEMS/OPA laser scanner, super-resolution image processing, and deep learning based object recognition, our lidar product will have the unprecedented advantages of anti-interference, adaptive high-speed scanning, 3D object recognition, and low cost over the conventional products.
In this talk, I will talk about the basic principle and algorithm of the intelligent 3D chaos lidar system, analyze the performance, and show some 3D imaging demonstrations.

Bio: Fan-Yi Lin received the B.S. degree in Electrophysics from National Chiao Tung University, Taiwan, in 1997 and the M.S. and Ph.D. degrees in Electrical Engineering from the University of California, Los Angeles, in 2001 and 2004, respectively. He joined the Department of Electrical Engineering and Institute of Photonics Technologies, National Tsing Hua University, Taiwan in 2004. His research interests include laser dynamics, lidar and radar, chaos, and photonic microwave generations.

More
Chengbin Ma

Associate Professor
University of Michigan - Shanghai Jiao Tong University Joint Institute

Title: Optimized Design and Control of High Efficiency, Low Noise, and Robust Megahertz Wireless Power Systems

Abstract: A high degree of spatial freedom makes wireless power transfer (WPT) working at several megahertz (MHz), 6.78 or 13.56 MHz, attractive for charging various electronic devices. However, the operation in the MHz frequency band presents technical challenges due to the potentially increased power losses, strong nonlinearities of the devices, and electromagnetic interference (EMI) problem. Both circuit-level and system-level analyses are important to derive requirements for a high overall system performance such as in efficiency and harmonics suppression. In addition, unavoidable uncertainties in a real WPT system require either a feedback mechanism or improved design to enhance the robustness of the performance. This presentation reviews the activities on MHz WPT conducted by our group, particularly at the modeling, design, and control aspects. First the challenges from the MHz WPT are summarized and explained. The Class E power amplifier (PA) and Class E rectifier, i.e., Class E^2 DC-DC converters, are then introduced into the MHz WPT systems thanks to the soft-switching properties of the PA and rectifier. The Class E topology also makes the analytical derivations possible. This advantage is particularly useful for the following optimization-based designs. Besides the improvements in efficiency and EMI problem, both the feedback-based and design-based approaches are especially developed to enhance the robustness of the WPT systems when there are variations in the coil relative position and final load, the two major sources of uncertainties. Finally, the initial efforts on the multiple-receiver MHz WPT systems are mentioned such as design of a current-mode Class E PA, analysis and compensation of cross coupling, and application in battery cell equalization. For details, please refer to our publications.[LINK]

Bio: Professor Chengbin Ma received the B.S. degree in industrial automation from East China University of Science and Technology, Shanghai, China, in 1997, and the M.S. and Ph.D. degrees in electrical engineering from The University of Tokyo, Tokyo, Japan, in 2001 and 2004, respectively. From 2004 to 2006, he was an R&D Researcher with the Servo Motor Laboratory, FANUC Limited, Japan. Between 2006 and 2008, he was a Postdoctoral Researcher with the Department of Mechanical and Aeronautical Engineering, University of California, Davis, USA. He joined the University of Michigan–Shanghai Jiao Tong University Joint Institute (UM-SJTU Joint Institute), Shanghai Jiao Tong University, Shanghai, China, in 2008, and currently an Associate Professor of electrical and computer engineering. His research interests include energy and battery management, wireless power transfer, motion control and mechatronics, and wide applications from electronic devices, electric vehicles to microgrids and smart grids.
Dr. Ma is currently a Vice Chair, Energy Storage Technical Committee, IEEE Industrial Electronics Society, and an Associated Editor of the IEEE Industrial Electronics Technical News (ITeN) and the IEEE Transactions on Industrial Informatics. At Shanghai Jiao Tong University, he received Outstanding Teaching Award in 2016, Research Excellence Award from UM-SJTU Joint Institute in 2015 and 2016, and the Dynamic Systems Control Laboratory he has established won the award of SJTU Koguan Top Ten Best Research Groups in 2014. The PhD student he supervised won the award of SJTU Top Ten Academic Star in 2016. (email: chbma@sjtu.edu.cn; web:http://umji.sjtu.edu.cn/lab/dsc/)

More
Alberto L. Sangiovanni-Vincentelli

Professor
The Edgar L. and Harold H. Buttner Chair of EECS

Title: The Wonders and Threats of the Instrumented World

Abstract: Information technology moves rapidly to an increasingly decentralized and collaborative environment (the Cloud) with rich interfaces to the physical world (the Internet of Things). In particular, it has been predicted that by 2020 several billions (thousands per person) of electronic devices will be available. These devices will allow making the computing infrastructure invisible to humans and supporting societal scale applications that are unthinkable today. However, even today, we are facing a number of severe challenges in applications such as autonomous vehicles, that should be monitored carefully with respect to safety, security and privacy concerns.
Design of complex distributed system such as the Internet of Things is essentially about connections: Connection of concepts, Connection of objects, Connection of teams. Products of the future will be connected across physical and virtual domains. Connections can produce systems that offer more than the sum of the components but they can also lead to systems that are less powerful, secure and private than the sum of the components or that are so compromised by their interactions that they do not work at all. And this situation is getting worse: a nightmare waiting to occur! An efficient management of interactions among deployed parts of a larger system requires principles that are common to the design methods developed at the bleeding edge of technology. I will point to a number of exciting fields such as Industry 4.0, energy efficiency, synthetic biology, autonomous aircraft and cars where advances are constantly made towards the mastering of distributed, autonomous systems.

Bio: Alberto Sangiovanni-Vincentelli holds the Edgar L. and Harold H. Buttner Chair of Electrical Engineering and Computer Sciences, at University of California, Berkeley. He helped founding Cadence and Synopsys, the two leading companies in EDA. He consulted for companies such as Intel, HP, Bell Labs, IBM, Samsung, UTC, Kawasaki Steel, Fujitsu, Telecom Italia, Pirelli, GM, BMW, Mercedes, Magneti Marelli, ST Microelectronics, ELT and UniCredit. He earned the IEEE/RSE Maxwell Award for “groundbreaking contributions that have had an exceptional impact on the development of electronics and electrical engineering”, the Kaufmann Award for seminal contributions to EDA, the EDAA lifetime Achievement Award, the IEEE/ACM R. Newton Impact Award, the University of California Distinguished Teaching Award, and the IEEE Graduate Teaching Award for inspirational teaching of graduate students. He is an IEE and ACM fellow, a member of the National Academy of Engineering and holds two honorary Doctorates. He authored over 850 papers, 17 books and 2 patents.

More
Alwyn Seeds

Head of Department and Professor
Opto-Electronics, University College London

Title: Photonic Integration for Microwave Photonic Systems

Abstract: Complex photonic systems for coherent optical communications and microwave photonics can benefit from monolithic integration of the key photonic devices with their interconnecting waveguides. Advantages include improved stability and environmental ruggedness, reduced size and reduced cost.
The talk will describe two approaches: monolithic integration on InP substrates, where the technology is evolving towards a foundry approach, and the direct epitaxial growth of quantum dot devices on silicon substrates, which has the potential to enable integration with waveguides and silicon electronics and offers much reduced substrate costs.
Among the results to be presented are the first monolithically integrated heterodyne optical phase lock loops; the first integration of tuneable lasers with uni-travelling carrier photodiodes; the first microwave photonic circuits fabricated using an InP foundry process and the first telecommunications wavelength quantum dot lasers monolithically integrated on silicon substrates.

Bio: Alwyn Seeds received the Ph.D. and D.Sc. degrees from the University of London. From 1980 to 1983 he was a Staff Member at Lincoln Laboratory, Massachusetts Institute of Technology, where he worked on GaAs monolithic millimetre-wave integrated circuits for use in phased-array radar. He returned to England in 1983, to take up a lectureship in telecommunications at Queen Mary College, University of London, moving to University College London in 1986, where he is now Professor of Opto-electronics and Head of the Photonics Group. He has published over 350 papers and many patents on microwave and opto-electronic devices and their systems applications. His current research interests include microwave and THz photonics and photonic integration.
Professor Seeds has been elected a Fellow of the Royal Academy of Engineering (UK), an IEEE Fellow (USA), and has served as a Member of the Board of Governors and Vice-President for Technical Affairs of the IEEE Photonics Society (USA). He is Principal Investigator of the EPSRC Programme Grant on Coherent THz Systems, Director of the joint UCL-Cambridge EPSRC Centre for Doctoral Training in Integrated Photonic and Electronic Systems and Director of the National Dark Fibre Infrastructure Service (UK). He is a co-founder of ZinWave Inc., a manufacturer of wireless over fibre systems, which was acquired by McWane Technologies in 2014. He was awarded the 2012 Gabor Medal and Prize of the Institute of Physics for his work on microwave photonics.

More
Hiroo Sekiya

Professor
Chiba University

Title: Theory and design of wireless power transfer systems with inductive coupling.

Abstract: Wireless power transfer (WPT) systems have received considerable attentions. A loosely inductive coupling (LIC) is one of the coupling states for WPT systems and it has been widely used for a variety of applications, such as wireless battery charging for electric vehicles, smart phone, bio-medical implants, and so on. For size reduction of WPT systems, high frequency operation is expected. However, we suffer from switching losses of both transmitter and receiver at high frequencies as well as magnetic-component power losses.
This talk presents analysis and design of high-frequency high-efficiency WPT systems. This talks include: 1. class-E switching technique and its application to resonant converters, 2. magnetic-component design techniques for achieving low equivalent series resistance, 3. step-by-step design procedure of the high-frequency high-efficiency WPT systems, and 4. our laboratory experimental results.

Bio: Hiroo Sekiya received the B.E., M.E., and Ph.D. degrees in electrical engineering from Keio University, Yokohama, Japan, in 1996, 1998, and 2001 respectively. Since April 2001, he has been with Chiba University and now he is a Professor at Graduate School of Engineering, Chiba University, Chiba, Japan. From Feb. 2008 to Feb. 2010, he was also with Electrical Engineering, Wright State University, Ohio, USA as a visiting scholar. His research interests include high-frequency high-efficiency tuned power amplifiers, resonant dc/dc power converters, dc/ac inverters, nonlinear phenomena on electrical circuits, and digital signal processing for wireless communications. He received 2008 Funai Information and Science Award for Young Scientist, 2008 Hiroshi Ando Memorial Young Engineering Award, Ericsson Young Scientist Award 2008, and Best Paper Award of ICUFN2010.

More
Steve Trimberger

Fellow
Xilinx Inc.

Title: FPGA Computing Yesterday Today and Tomorrow

Abstract: Since their inception, FPGAs have been envisioned as compute devices. Many demonstration systems were built, but widespread adoption seems to be only arriving now. Why has it taken so long? Recent deployment of FPGAs in data centers have highlighted the potential for FPGAs to take on tasks that have been envisioned as the domain of traditional instruction set processors. Can FPGAs address many of our data center tasks in database operations, search and machine learning? Many common applications of FPGAs today take advantage of FPGAs to deliver high-speed and low-power computing in embedded applications. These applications give us an indication of how FPGAs can contribute in the future. This talk retraces the evolution of FPGA technology from a simple ASIC alternative to a full computing system, and covers novel work on FPGA-based machine learning algorithms.

Bio: Dr. Steve Trimberger holds a Ph.D. degree from California Institute of Technology. Since 1988, he has been employed at Xilinx, where he is currently Xilinx Fellow heading the Circuits and Architectures Group in Xilinx Research Labs in San Jose, California. He was the technical leader for the XC4000 design automation software, developed a dynamically-reconfigurable multi-context FPGA, led the architecture definition group for the Xilinx XC4000X device families and designed the bitstream security functions in the Xilinx Virtex families of FPGAs. He led the group that developed the first die-stacked 3D FPGA prototype at Xilinx. He has served as Design Methods Chair for the Design Automation Conference, Program Chair and General Chair for the ACM/SIGDA FPGA Symposium and on the technical programs of numerous Workshops and Symposia. He has authored five books and dozens of papers on design automation, FPGA architectures and hardware security. He has more than 230 patents in IC design, FPGA and ASIC architecture, CAE, hardware security and cryptography. His innovations appear today in nearly all commercial FPGA devices. He is a member of the United States National Academy of Engineering, a Fellow of the ACM, and a Fellow of the IEEE.

More
Kang Wang

Distinguished Professor and Raytheon Chair in Electrical Engineering
University of California at Los Angeles

Title: Spintronics and Nanomagnetics: Opportunities and Challenges

Abstract: Spintronics has emerged as a low power option for tackling the energy dissipation challenge of today’s electronic systems. For computing in the big data era, energy efficient nonvolatile memory is critical for embedded integration with CMOS. With nonvolatile magnetic memory, the leakage current can be much minimized and the voltage scaling can be further advanced due to the collective behavior of magnetism. Currently, spin transfer torque technology (STT) has been demonstrated and STT-RAM chips are in mass production with integration of CMOS. The success of the STT adoption will lead to additional opportunities and applications of spintronics in industry. I will discuss the opportunity and challenges of spintronics and nanomagnetics.
Riding on the success of STT and using similar materials technology, this talk will then address the use of electric field, or magneto-electric (ME) effect, to improve further the energy efficiency of switching. Magnetic memory arrays based on this ME effect, referred to as magnetoelectric RAM or MeRAM, is shown to have several orders of magnitude lower energy dissipation and higher density in comparison with spin transfer torque memory (STTRAM). This voltage control of magnetism is enabled by Spin Orbital Coupling (SOC), making possible lower write energy and enabling further scaling.
Likewise, the large SOC is also shown to give rise to a large Spin-Orbit Torque (SOT) for highly energy efficient applications and this area has become the spotlight in the field dubbed as spin-orbitronics. Due to the presence of an intrinsic extraordinarily strong SOC and spin-momentum lock, topological insulators (TIs) are expected to be a promising candidate for high SOT applications and I will show indeed a giant SOT of three orders of magnitude larger than those reported in heavy metals.
The impact from this progress on electronic system performances and its revolutionary potentials to enable new computing paradigms for big data and for intelligent, autonomous, decision systems will be described. The challenges of spintronics in terms of technology and foundry adoption as well as the low on-off ratio will also be discussed.

Bio: Dr. Kang L. Wang is currently Distinguished Professor and the Raytheon Chair Professor in Physical Science and Electronics in the University of California, Los Angeles (UCLA). He is affiliated with the Departments of ECE, MSE and Physics. He received his BS degree from National Cheng Kung University (Taiwan) and his MS and PhD degrees from the Massachusetts Institute of Technology. He is a Member of Academia Sinica, Fellow of the IEEE, and a member of the American Physical Society. He was a Guggenheim Fellow. He also served as Editor-in-Chief of IEEE TNANO, editor of Artech House, Consulting Editor for Spins, and Associate Editor for Science Advances. His research areas include nanoscale physics and materials; molecular beam epitaxy; topological and quantum matters; spintronics and low dissipation devices; neurodynamics and neurotronics.

More
Yu Wang

Associate Professor
Tsinghua University

Title: Software-Hardware Co-Design for Efficient Neural Network Acceleration on FPGA

Abstract: Artificial neural networks,efficiency compared with general-purpose processors. However, the long development period and insufficient performance of traiditional FPGA acceleration prevent it from wide utilization. We propose a complete design flow to achieve both fast deployment and high energy efficiency for accelerating neural networks on FPGA [FPGA 16, FPGA 17 best paper]. Deep compression and data quantization are employed to exploit the redundancy in algorithm and reduce both computational and memory complexity. Two architecture designs for CNN and DNN/RNN are proposed together with compilation environment. Evaluated on Xilinx Zynq 7000 and Kintex Ultrascale series FPGA with real-world neural networks, up to 15 times higher energy efficieny can be achieved compared with mobile GPU and desktop GPU. Finally, we will discuss the possibilities and trends of adopting emerging NVM technology for efficient learning systems to further improve the energy efficiency.

Bio: Yu Wang received his B.S. degree in 2002 and Ph.D. degree (with honor) in 2007 from Tsinghua University, Beijing. He is currently a tenured Associate Professor with the Department of Electronic Engineering, Tsinghua University. His research interests include brain inspired computing, application specific hardware computing, parallel circuit analysis, and power/reliability aware system design methodology. Dr. Wang has authored and coauthored over 150 papers in refereed journals and conferences. He has received Best Paper Award in FPGA 2017, ISVLSI 2012, and Best Poster Award in HEART 2012 with 7 Best Paper Nominations. He is a recipient of IBM X10 Faculty Award in 2010. He served as TPC chair for ICFPT 2011 and Finance Chair of ISLPED 2012-2016, and served as program committee member for leading conferences in these areas, including top EDA conferences such as DAC, DATE, ICCAD, ASP-DAC, and top FPGA conferences such as FPGA and FPT. Currently he serves as Co-Editor-in-Chief for ACM SIGDA E-Newsletter, Associate Editor for IEEE Transactions on CAD, and Journal of Circuits, Systems, and Computers. He also serves as guest editor for Integration, the VLSI Journal and IEEE Transactions on Multi-Scale Computing Systems. He has given 25+ invited talks in industry/academia. He is now with ACM Distinguished Speaker Program. He is an ACM/IEEE Senior Member.

More
Shimeng Yu

Assistant Professor
Arizona State University

Title: Neuro-Inspired Computing with Emerging Non-Volatile Memory (NVM)

Abstract: This presentation discusses state-of-the-art, challenges and prospects of the neuro-inspired computing with emerging non-volatile memory (NVM) technologies. First, we discuss the demand for developing neuro-inspired architecture beyond today’s von-Neumann architecture, and we summarize the various approaches to designing the neuromorphic hardware (digital vs. analog, spiking vs. non-spiking, online training vs. offline training). Second, we discuss the desired characteristics of the synaptic devices (e.g. multilevel states, weight tuning linearity, variation/noises), and surveyed a few representative prototypes reported in the literature that show the “analog” synapse behaviors. Next, we introduce the crossbar array architecture to efficiently implement the weighted sum and weight update operations that are commonly used in the neuro-inspired machine learning algorithms, and review the recent progresses of array-level experimental demonstrations for these key operations. In particular, we discuss “NeuroSim”, a device-circuit-algorithm co-design framework to evaluate the impact of non-ideal device effects on the neuromorphic system performance (i.e. learning accuracy) and trade-offs in the circuit-level performance (i.e. area, latency, energy). Last, we propose to binarize the neural network algorithm to allow very low precision weights and neurons, thereby making it compatible to “digital” synapses (i.e. binary NVM).

Bio: Shimeng Yu received the B.S. degree in microelectronics from Peking University, Beijing, China in 2009, and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University, Stanford, CA, USA in 2011, and in 2013, respectively. He is currently an assistant professor of electrical engineering and computer engineering at Arizona State University, Tempe, AZ, USA.
His research interests are emerging nano-devices and circuits with a focus on the resistive memories for different applications including neuro-inspired computing, hardware security, monolithic 3D integration, and radiation-hard electronics, etc. He has published >60 journal papers and >90 conference papers with citations >4000 and H-index 29.
Among his honors, he is a recipient of the Stanford Graduate Fellowship from 2009 to 2012, the IEEE Electron Devices Society Masters Student Fellowship in 2010, the IEEE Electron Devices Society PhD Student Fellowship in 2012, the DOD-DTRA Young Investigator Award in 2015, and the NSF Faculty Early CAREER Award in 2016.
He did summer internship in IMEC, Belgium in 2011, and IBM TJ Watson Research Center in 2012. He held visiting faculty position in Air Force Research Laboratory in 2016. He served the Technical Program Committee for IEEE International Symposium on Circuits and Systems (ISCAS) 2015-2017, ACM/IEEE Design Automation Conference (DAC) 2017, and IEEE International Electron Devices Meeting (IEDM) 2017, etc.
Lab website: http://faculty.engineering.asu.edu/shimengyu/

More